ajet/corne-zmk-config
1
0
Fork 0
mirror of https://github.com/Ajetski/corne-zmk-config.git synced 2026-05-22 09:54:44 -09:00
Code Issues Packages Projects Releases Wiki Activity

inital corne configuration

Browse Source
This commit is contained in:
Chen Zeng
2024-07-21 11:22:32 +08:00
commit 0dcb541f71
30 changed files with 2619 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
config/boards/arm/sofle/Kconfig.board
+15
View File
@@ -0,0 +1,15 @@
#
# Copyright (c) 2022 Darryl deHaan
# SPDX-License-Identifier: MIT
#
config BOARD_CORNE_LEFT
bool "corne left"
depends on SOC_NRF52840_QIAA
config BOARD_CORNE_RIGHT
bool "corne right"
depends on SOC_NRF52840_QIAA
config/boards/arm/sofle/Kconfig.defconfig
+70
View File
@@ -0,0 +1,70 @@
#
# Copyright (c) 2022 Darryl deHaan
# SPDX-License-Identifier: MIT
#
if BOARD_CORNE_LEFT
config ZMK_KEYBOARD_NAME
default "Corne"
config ZMK_SPLIT_ROLE_CENTRAL
default y
endif # BOARD_CORNE_LEFT
if BOARD_CORNE_LEFT || BOARD_CORNE_RIGHT
config BOARD
default "corne"
config ZMK_SPLIT
default y
config BT_CTLR
default BT
if USB
config USB_NRFX
default y
config USB_DEVICE_STACK
default y
endif # USB
if ZMK_DISPLAY
config I2C
default y
config SSD1306
default y
choice ZMK_DISPLAY_WORK_QUEUE
default ZMK_DISPLAY_WORK_QUEUE_DEDICATED
endchoice
endif
if LVGL
config LV_Z_VDB_SIZE
default 64
config LV_DPI_DEF
default 148
config LV_Z_BITS_PER_PIXEL
default 1
choice LV_COLOR_DEPTH
default LV_COLOR_DEPTH_1
endchoice
endif
endif # BOARD_CORNE_LEFT || BOARD_CORNE_RIGHT
config/boards/arm/sofle/board.cmake
+6
View File
@@ -0,0 +1,6 @@
# Copyright (c) 2021 @MangoIV
# SPDX-License-Identifier: MIT
board_runner_args(nrfjprog "--nrf-family=NRF52" "--softreset")
include(${ZEPHYR_BASE}/boards/common/blackmagicprobe.board.cmake)
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
config/boards/arm/sofle/corne.conf
+23
View File
@@ -0,0 +1,23 @@
# go to sleep after one hour (1*60*60*1000ms)
CONFIG_ZMK_IDLE_SLEEP_TIMEOUT=3600000
# Turn on logging, and set ZMK logging to debug output
# CONFIG_ZMK_USB_LOGGING=n
#
# Copyright (c) 2022 Darryl deHaan
# SPDX-License-Identifier: MIT
#
CONFIG_ZMK_SLEEP=y
CONFIG_WS2812_STRIP=y
CONFIG_ZMK_RGB_UNDERGLOW=y
CONFIG_ZMK_RGB_UNDERGLOW_EXT_POWER=y
CONFIG_ZMK_RGB_UNDERGLOW_ON_START=n
CONFIG_ZMK_RGB_UNDERGLOW_BRT_MAX=90
CONFIG_ZMK_RGB_UNDERGLOW_AUTO_OFF_IDLE=y
CONFIG_ZMK_RGB_UNDERGLOW_AUTO_OFF_USB=y
CONFIG_ZMK_RGB_UNDERGLOW_HUE_START=160
CONFIG_ZMK_RGB_UNDERGLOW_EFF_START=3
#CONFIG_ZMK_HID_CONSUMER_REPORT_USAGES_BASIC=y
config/boards/arm/sofle/corne.dtsi
+189
View File
@@ -0,0 +1,189 @@
/*
*
* Copyright (c) 2021 Darryl deHaan
* SPDX-License-Identifier: MIT
*
*/
/dts-v1/;
#include <nordic/nrf52840_qiaa.dtsi>
#include <dt-bindings/led/led.h>
#include <dt-bindings/zmk/matrix_transform.h>
/ {
model = "corne";
compatible = "corne";
chosen {
zephyr,code-partition = &code_partition;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zmk,kscan = &kscan0;
zephyr,display = &oled;
zephyr,console = &cdc_acm_uart;
zmk,underglow = &led_strip;
zmk,matrix-transform = &default_transform;
};
left_encoder: encoder_left {
compatible = "alps,ec11";
label = "LEFT_ENCODER";
resolution = <4>;
status = "disabled";
};
sensors {
compatible = "zmk,keymap-sensors";
sensors = <&left_encoder>;
};
default_transform: keymap_transform_0 {
compatible = "zmk,matrix-transform";
columns = <14>;
rows = <5>;
map = <
RC(0,0) RC(0,1) RC(0,2) RC(0,3) RC(0,4) RC(0,5) RC(0,7) RC(0,8) RC(0,9) RC(0,10) RC(0,11) RC(0,12) RC(0,13)
RC(1,0) RC(1,1) RC(1,2) RC(1,3) RC(1,4) RC(1,5) RC(1,7) RC(1,8) RC(1,9) RC(1,10) RC(1,11) RC(1,12) RC(1,13)
RC(2,0) RC(2,1) RC(2,2) RC(2,3) RC(2,4) RC(2,5) RC(2,7) RC(2,8) RC(2,9) RC(2,10) RC(2,11) RC(2,12) RC(2,13)
RC(3,3) RC(3,4) RC(3,5) RC(3,7) RC(3,8) RC(3,9) RC(2,10)
RC(4,2) RC(4,7)
>;
};
};
&adc {
status = "okay";
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&usbd {
status = "okay";
cdc_acm_uart: cdc_acm_uart {
compatible = "zephyr,cdc-acm-uart";
};
};
&flash0 {
/*
* For more information, see:
* http://docs.zephyrproject.org/latest/devices/dts/flash_partitions.html
*/
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
sd_partition: partition@0 {
reg = <0x00000000 0x00026000>;
};
code_partition: partition@26000 {
reg = <0x00026000 0x000c6000>;
};
/*
* The flash starting at 0x000ec000 and ending at
* 0x000f3fff is reserved for use by the application.
*/
/*
* Storage partition will be used by FCB/LittleFS/NVS
* if enabled.
*/
storage_partition: partition@ec000 {
reg = <0x000ec000 0x00008000>;
};
boot_partition: partition@f4000 {
reg = <0x000f4000 0x0000c000>;
};
};
};
&pinctrl {
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 17)>,
<NRF_PSEL(TWIM_SCL, 0, 20)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 17)>,
<NRF_PSEL(TWIM_SCL, 0, 20)>;
low-power-enable;
};
};
spi3_default: spi3_default {
group1 {
psels = <NRF_PSEL(SPIM_MOSI, 1, 12)>; // WS2812_VEXT_DATA
};
};
spi3_sleep: spi3_sleep {
group1 {
psels = <NRF_PSEL(SPIM_MOSI, 1, 12)>;
low-power-enable;
};
};
};
&i2c0 {
status = "okay";
compatible = "nordic,nrf-twi";
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
oled: ssd1306@3c {
compatible = "solomon,ssd1306fb";
reg = <0x3c>;
label = "DISPLAY";
width = <128>;
height = <32>;
segment-offset = <0>;
page-offset = <0>;
display-offset = <0>;
multiplex-ratio = <31>;
segment-remap;
com-invdir;
com-sequential;
prechargep = <0x22>;
};
};
&spi3 {
compatible = "nordic,nrf-spim";
status = "okay";
pinctrl-0 = <&spi3_default>;
pinctrl-1 = <&spi3_sleep>;
pinctrl-names = "default", "sleep";
led_strip: ws2812@0 {
compatible = "worldsemi,ws2812-spi";
/* SPI */
reg = <0>; /* ignored, but necessary for SPI bindings */
spi-max-frequency = <4000000>;
/* WS2812 */
chain-length = <6>;
spi-one-frame = <0x70>;
spi-zero-frame = <0x40>;
color-mapping = <LED_COLOR_ID_GREEN LED_COLOR_ID_RED LED_COLOR_ID_BLUE>;
};
};
config/boards/arm/sofle/corne.yaml
+20
View File
@@ -0,0 +1,20 @@
identifier: corne
name: Solfe
url: https://github.com/tokyo2006/zmk-config-corne
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 40
supported:
- adc
- usb_device
- ble
- ieee802154
- pwm
- watchdog
- gpio
- i2c
- spi
config/boards/arm/sofle/corne.zmk.yml
+15
View File
@@ -0,0 +1,15 @@
file_format: "1"
id: corne
name: Sofle
url: https://github.com/tokyo2006/zmk-config-corne
type: board
arch: arm
features:
- keys
- display
outputs:
- usb
- ble
siblings:
- corne_left
- corne_right
config/boards/arm/sofle/corne_left.dts
+55
View File
@@ -0,0 +1,55 @@
/*
*
* Copyright (c) 2021 Darryl deHaan
* SPDX-License-Identifier: MIT
*
*/
#include "corne.dtsi"
/{
chosen {
zmk,battery = &vbatt;
};
kscan0: kscan {
compatible = "zmk,kscan-gpio-matrix";
wakeup-source;
diode-direction = "col2row";
row-gpios
= <&gpio0 19 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpio0 8 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpio0 12 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpio0 11 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpio1 9 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
;
col-gpios
= <&gpio0 3 GPIO_ACTIVE_HIGH>
, <&gpio0 28 GPIO_ACTIVE_HIGH>
, <&gpio0 30 GPIO_ACTIVE_HIGH>
, <&gpio0 21 GPIO_ACTIVE_HIGH>
, <&gpio0 23 GPIO_ACTIVE_HIGH>
, <&gpio0 22 GPIO_ACTIVE_HIGH>
;
};
ext-power {
compatible = "zmk,ext-power-generic";
label = "EXT_POWER";
control-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
init-delay-ms = <50>;
};
vbatt: vbatt {
compatible = "zmk,battery-nrf-vddh";
};
};
&left_encoder {
a-gpios = <&gpio1 10 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>;
b-gpios = <&gpio1 14 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>;
status = "okay";
};
config/boards/arm/sofle/corne_left_defconfig
+77
View File
@@ -0,0 +1,77 @@
#
# Copyright (c) 2022 Darryl deHaan
# SPDX-License-Identifier: MIT
#
CONFIG_SOC_SERIES_NRF52X=y
CONFIG_SOC_NRF52840_QIAA=y
CONFIG_BOARD_CORNE_LEFT=y
CONFIG_ZMK_SLEEP=y
# Enable MPU
CONFIG_ARM_MPU=y
# enable pinctrl
CONFIG_PINCTRL=y
# enable GPIO
CONFIG_GPIO=y
# Enable SPI
CONFIG_SPI=y
# Enable writing to flash
CONFIG_USE_DT_CODE_PARTITION=y
CONFIG_BUILD_OUTPUT_UF2=y
CONFIG_MPU_ALLOW_FLASH_WRITE=y
CONFIG_NVS=y
CONFIG_SETTINGS_NVS=y
CONFIG_FLASH=y
CONFIG_FLASH_PAGE_LAYOUT=y
CONFIG_FLASH_MAP=y
# Enable 32kHz crystal
CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=y
CONFIG_CLOCK_CONTROL_NRF_K32SRC_30PPM=y
CONFIG_ZMK_USB=y
CONFIG_ZMK_BLE=y
# enable display drivers
CONFIG_ZMK_DISPLAY=y
CONFIG_ZMK_DISPLAY_WORK_QUEUE_DEDICATED=y
CONFIG_ZMK_DISPLAY_DEDICATED_THREAD_STACK_SIZE=2048
CONFIG_LV_Z_BITS_PER_PIXEL=1
CONFIG_LV_COLOR_DEPTH_1=y
CONFIG_LV_DPI_DEF=145
CONFIG_LV_Z_VDB_SIZE=100
CONFIG_LV_USE_THEME_MONO=y
CONFIG_LV_COLOR_CHROMA_KEY_HEX=0x00FF00
CONFIG_ZMK_LV_FONT_DEFAULT_SMALL_MONTSERRAT_16=y
CONFIG_LV_FONT_MONTSERRAT_26=y
CONFIG_LV_FONT_DEFAULT_MONTSERRAT_26=y
#EXT POWER
CONFIG_ZMK_EXT_POWER=y
#BLE-passkey
CONFIG_ZMK_BLE_PASSKEY_ENTRY=n
#BLE-clean
CONFIG_ZMK_BLE_CLEAR_BONDS_ON_START=n
#usb-name
CONFIG_USB_DEVICE_MANUFACTURER="corne"
CONFIG_BT_CTLR_TX_PWR_PLUS_8=y
CONFIG_ZMK_HID_REPORT_TYPE_NKRO=n
#CONFIG_ZMK_HID_CONSUMER_REPORT_USAGES_BASIC=y
#EC11 enable
CONFIG_EC11=y
CONFIG_EC11_TRIGGER_GLOBAL_THREAD=y
config/boards/arm/sofle/corne_right.dts
+76
View File
@@ -0,0 +1,76 @@
/*
*
* Copyright (c) 2021 Darryl deHaan
* SPDX-License-Identifier: MIT
*
*/
#include "corne.dtsi"
/{
chosen {
zmk,battery = &vbatt;
};
kscan0: kscan {
compatible = "zmk,kscan-gpio-matrix";
wakeup-source;
diode-direction = "col2row";
row-gpios
= <&gpio0 19 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpio0 8 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpio0 12 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpio0 11 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpio1 9 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
;
col-gpios
= <&gpio0 22 GPIO_ACTIVE_HIGH>
, <&gpio0 29 GPIO_ACTIVE_HIGH>
, <&gpio0 3 GPIO_ACTIVE_HIGH>
, <&gpio0 28 GPIO_ACTIVE_HIGH>
, <&gpio0 30 GPIO_ACTIVE_HIGH>
, <&gpio0 21 GPIO_ACTIVE_HIGH>
, <&gpio0 23 GPIO_ACTIVE_HIGH>
;
};
ext-power {
compatible = "zmk,ext-power-generic";
label = "EXT_POWER";
control-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
init-delay-ms = <50>;
};
vbatt: vbatt {
compatible = "zmk,battery-nrf-vddh";
// init-delay-ms = <50>;
};
};
&default_transform {
col-offset = <7>;
};
&spi3 {
compatible = "nordic,nrf-spim";
status = "okay";
pinctrl-0 = <&spi3_default>;
pinctrl-1 = <&spi3_sleep>;
pinctrl-names = "default", "sleep";
led_strip: ws2812@0 {
compatible = "worldsemi,ws2812-spi";
/* SPI */
reg = <0>; /* ignored, but necessary for SPI bindings */
spi-max-frequency = <4000000>;
/* WS2812 */
chain-length = <7>; /* 6 keys have underglow at the moment */
spi-one-frame = <0x70>;
spi-zero-frame = <0x40>;
color-mapping = <LED_COLOR_ID_GREEN LED_COLOR_ID_RED LED_COLOR_ID_BLUE>;
};
};
config/boards/arm/sofle/corne_right_defconfig
+74
View File
@@ -0,0 +1,74 @@
#
# Copyright (c) 2022 Darryl deHaan
# SPDX-License-Identifier: MIT
#
CONFIG_SOC_SERIES_NRF52X=y
CONFIG_SOC_NRF52840_QIAA=y
CONFIG_BOARD_CORNE_RIGHT=y
CONFIG_ZMK_SLEEP=y
# Enable MPU
CONFIG_ARM_MPU=y
# enable pinctrl
CONFIG_PINCTRL=y
# enable GPIO
CONFIG_GPIO=y
# Enable SPI
CONFIG_SPI=y
# Enable writing to flash
CONFIG_USE_DT_CODE_PARTITION=y
CONFIG_BUILD_OUTPUT_UF2=y
CONFIG_MPU_ALLOW_FLASH_WRITE=y
CONFIG_NVS=y
CONFIG_SETTINGS_NVS=y
CONFIG_FLASH=y
CONFIG_FLASH_PAGE_LAYOUT=y
CONFIG_FLASH_MAP=y
# Enable 32kHz crystal
CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=y
CONFIG_CLOCK_CONTROL_NRF_K32SRC_30PPM=y
CONFIG_ZMK_USB=n
CONFIG_ZMK_BLE=y
# enable display drivers
CONFIG_ZMK_DISPLAY=y
CONFIG_ZMK_DISPLAY_WORK_QUEUE_DEDICATED=y
CONFIG_ZMK_DISPLAY_DEDICATED_THREAD_STACK_SIZE=2048
CONFIG_LV_Z_BITS_PER_PIXEL=1
CONFIG_LV_COLOR_DEPTH_1=y
CONFIG_LV_DPI_DEF=145
CONFIG_LV_Z_VDB_SIZE=100
CONFIG_LV_USE_THEME_MONO=y
CONFIG_LV_COLOR_CHROMA_KEY_HEX=0x00FF00
CONFIG_ZMK_LV_FONT_DEFAULT_SMALL_MONTSERRAT_16=y
CONFIG_LV_FONT_MONTSERRAT_26=y
CONFIG_LV_FONT_DEFAULT_MONTSERRAT_26=y
#EXT POWER
CONFIG_ZMK_EXT_POWER=y
#BLE-passkey
CONFIG_ZMK_BLE_PASSKEY_ENTRY=n
#BLE-clean
CONFIG_ZMK_BLE_CLEAR_BONDS_ON_START=n
#usb-name
CONFIG_USB_DEVICE_MANUFACTURER="corne"
CONFIG_BT_CTLR_TX_PWR_PLUS_8=y
CONFIG_ZMK_HID_REPORT_TYPE_NKRO=n
config/boards/shields/nice_view_adapter/Kconfig.defconfig
View File
config/boards/shields/nice_view_adapter/Kconfig.shield
+2
View File
@@ -0,0 +1,2 @@
config SHIELD_NICE_VIEW_ADAPTER
def_bool $(shields_list_contains,nice_view_adapter)
config/boards/shields/nice_view_adapter/boards/sofle_left.overlay
+29
View File
@@ -0,0 +1,29 @@
&pinctrl {
spi0_default: spi0_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 20)>,
<NRF_PSEL(SPIM_MOSI, 0, 17)>,
<NRF_PSEL(SPIM_MISO, 0, 25)>;
};
};
spi0_sleep: spi0_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 20)>,
<NRF_PSEL(SPIM_MOSI, 0, 17)>,
<NRF_PSEL(SPIM_MISO, 0, 25)>;
low-power-enable;
};
};
};
nice_view_spi: &spi0 {
compatible = "nordic,nrf-spim";
pinctrl-0 = <&spi0_default>;
pinctrl-1 = <&spi0_sleep>;
pinctrl-names = "default", "sleep";
cs-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
};
&i2c0 {
status = "disabled";
};
config/boards/shields/nice_view_adapter/boards/sofle_right.overlay
+29
View File
@@ -0,0 +1,29 @@
&pinctrl {
spi0_default: spi0_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 20)>,
<NRF_PSEL(SPIM_MOSI, 0, 17)>,
<NRF_PSEL(SPIM_MISO, 0, 25)>;
};
};
spi0_sleep: spi0_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 20)>,
<NRF_PSEL(SPIM_MOSI, 0, 17)>,
<NRF_PSEL(SPIM_MISO, 0, 25)>;
low-power-enable;
};
};
};
nice_view_spi: &spi0 {
compatible = "nordic,nrf-spim";
pinctrl-0 = <&spi0_default>;
pinctrl-1 = <&spi0_sleep>;
pinctrl-names = "default", "sleep";
cs-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
};
&i2c0 {
status = "disabled";
};
config/boards/shields/nice_view_adapter/nice_view_adapter.conf
+5
View File
@@ -0,0 +1,5 @@
CONFIG_SSD1306=n
# Enable Nice View
CONFIG_ZMK_DISPLAY_STATUS_SCREEN_BUILT_IN=y
CONFIG_ZMK_LV_FONT_DEFAULT_SMALL_MONTSERRAT_26=y
CONFIG_LV_FONT_DEFAULT_MONTSERRAT_26=y
config/boards/shields/nice_view_adapter/nice_view_adapter.overlay
View File
config/boards/shields/nice_view_adapter/nice_view_adapter.zmk.yml
+7
View File
@@ -0,0 +1,7 @@
file_format: "1"
id: nice_view_adapter
name: nice!view adapter
type: shield
url: https://nicekeyboards.com/nice-view
requires: [i2c_oled]
exposes: [nice_view_header]