ajet/corne-zmk-config
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refactor: rename and modularize

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honorless
2024-11-12 23:34:29 -05:00
parent d6b2ce7e6a
commit 8565de6480
19 changed files with 50 additions and 46 deletions
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boards/arm/eyelash_corne/Kconfig.board
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#
# Copyright (c) 2024 The ZMK Contributors
# SPDX-License-Identifier: MIT
#
config BOARD_EYELASH_CORNE_LEFT
bool "eyelash_corne left"
depends on SOC_NRF52840_QIAA
config BOARD_EYELASH_CORNE_RIGHT
bool "eyelash_corne right"
depends on SOC_NRF52840_QIAA
boards/arm/eyelash_corne/Kconfig.defconfig
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#
# Copyright (c) 2024 The ZMK Contributors
# SPDX-License-Identifier: MIT
#
if BOARD_EYELASH_CORNE_LEFT
config ZMK_KEYBOARD_NAME
default "Eyelash Corne"
config ZMK_SPLIT_ROLE_CENTRAL
default y
endif # BOARD_EYELASH_CORNE_LEFT
if BOARD_EYELASH_CORNE_LEFT || BOARD_EYELASH_CORNE_RIGHT
config BOARD
default "eyelash_corne"
config BOARD_ENABLE_DCDC
bool "Enable DCDC mode"
select SOC_DCDC_NRF52X
default y
config BOARD_ENABLE_DCDC_HV
bool "Enable High Voltage DCDC converter"
default y
select SOC_DCDC_NRF52X_HV
depends on (BOARD_EYELASH_CORNE_LEFT || BOARD_EYELASH_CORNE_RIGHT)
config ZMK_SLEEP
default y
config ZMK_SPLIT
default y
config BT_CTLR
default BT
if USB
config USB_NRFX
default y
config USB_DEVICE_STACK
default y
endif # USB
if ZMK_BACKLIGHT
config PWM
default y
config LED_PWM
default y
endif # ZMK_BACKLIGHT
endif # BOARD_EYELASH_CORNE_LEFT || BOARD_EYELASH_CORNE_RIGHT
boards/arm/eyelash_corne/board.cmake
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# Copyright (c) 2024 The ZMK Contributors
# SPDX-License-Identifier: MIT
board_runner_args(nrfjprog "--nrf-family=NRF52" "--softreset")
include(${ZEPHYR_BASE}/boards/common/uf2.board.cmake)
include(${ZEPHYR_BASE}/boards/common/blackmagicprobe.board.cmake)
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
boards/arm/eyelash_corne/eyelash_corne.dtsi
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/*
*
* Copyright (c) 2024 The ZMK Contributors
* SPDX-License-Identifier: MIT
*
*/
/dts-v1/;
#include <nordic/nrf52840_qiaa.dtsi>
#include <dt-bindings/led/led.h>
#include <dt-bindings/zmk/matrix_transform.h>
/ {
model = "eyelash_corne";
compatible = "eyelashperipherals,eyelash_corne";
chosen {
zephyr,code-partition = &code_partition;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zmk,kscan = &kscan0;
zmk,battery = &vbatt;
zmk,underglow = &led_strip;
zmk,matrix-transform = &default_transform;
zmk,backlight = &backlight;
};
vbatt: vbatt {
compatible = "zmk,battery-nrf-vddh";
};
EXT_POWER {
compatible = "zmk,ext-power-generic";
control-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
init-delay-ms = <50>;
};
left_encoder: encoder_left {
compatible = "alps,ec11";
a-gpios = <&gpio1 10 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>;
b-gpios = <&gpio1 14 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>;
steps = <40>;
status = "disabled";
};
sensors {
compatible = "zmk,keymap-sensors";
triggers-per-rotation = <20>;
sensors = <&left_encoder>;
};
kscan0: kscan {
compatible = "zmk,kscan-gpio-matrix";
wakeup-source;
diode-direction = "col2row";
row-gpios
= <&gpio0 19 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpio0 8 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpio0 12 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpio0 11 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpio1 9 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
;
col-gpios
= <&gpio0 3 GPIO_ACTIVE_HIGH>
, <&gpio0 28 GPIO_ACTIVE_HIGH>
, <&gpio0 30 GPIO_ACTIVE_HIGH>
, <&gpio0 21 GPIO_ACTIVE_HIGH>
, <&gpio0 23 GPIO_ACTIVE_HIGH>
, <&gpio0 22 GPIO_ACTIVE_HIGH>
, <&gpio0 29 GPIO_ACTIVE_HIGH>
;
};
default_transform: keymap_transform_0 {
compatible = "zmk,matrix-transform";
columns = <14>;
rows = <5>;
map = <
RC(0,0) RC(0,1) RC(0,2) RC(0,3) RC(0,4) RC(0,5) RC(0,12) RC(0,13) RC(0,7) RC(0,8) RC(0,9) RC(0,10) RC(0,11)
RC(1,0) RC(1,1) RC(1,2) RC(1,3) RC(1,4) RC(1,5) RC(2,12) RC(4,12) RC(3,12) RC(1,13) RC(1,7) RC(1,8) RC(1,9) RC(1,10) RC(1,11)
RC(2,0) RC(2,1) RC(2,2) RC(2,3) RC(2,4) RC(2,5) RC(3,2) RC(1,12) RC(2,13) RC(2,7) RC(2,8) RC(2,9) RC(2,10) RC(2,11)
RC(3,3) RC(3,4) RC(3,5) RC(3,13) RC(3,7) RC(3,8)
>;
};
backlight: pwmleds {
compatible = "pwm-leds";
pwm_led_0 {
pwms = <&pwm0 0 PWM_MSEC(1) PWM_POLARITY_NORMAL>;
};
};
};
&adc {
status = "okay";
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
zephyr_udc0: &usbd {
status = "okay";
};
&flash0 {
/*
* For more information, see:
* http://docs.zephyrproject.org/latest/devices/dts/flash_partitions.html
*/
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
sd_partition: partition@0 {
reg = <0x00000000 0x00026000>;
};
code_partition: partition@26000 {
reg = <0x00026000 0x000c6000>;
};
/*
* The flash starting at 0x000ec000 and ending at
* 0x000f3fff is reserved for use by the application.
*
* Storage partition will be used by FCB/LittleFS/NVS
* if enabled.
*/
storage_partition: partition@ec000 {
reg = <0x000ec000 0x00008000>;
};
boot_partition: partition@f4000 {
reg = <0x000f4000 0x0000c000>;
};
};
};
&pinctrl {
spi0_default: spi0_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 20)>,
<NRF_PSEL(SPIM_MOSI, 0, 17)>,
<NRF_PSEL(SPIM_MISO, 0, 25)>;
};
};
spi0_sleep: spi0_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 20)>,
<NRF_PSEL(SPIM_MOSI, 0, 17)>,
<NRF_PSEL(SPIM_MISO, 0, 25)>;
low-power-enable;
};
};
pwm0_default: pwm0_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 1, 13)>;
};
};
pwm0_sleep: pwm0_sleep {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 1, 13)>;
low-power-enable;
};
};
spi3_default: spi3_default {
group1 {
psels = <NRF_PSEL(SPIM_MOSI, 1, 12)>; // WS2812_VEXT_DATA
};
};
spi3_sleep: spi3_sleep {
group1 {
psels = <NRF_PSEL(SPIM_MOSI, 1, 12)>;
low-power-enable;
};
};
};
nice_view_spi: &spi0 {
compatible = "nordic,nrf-spim";
pinctrl-0 = <&spi0_default>;
pinctrl-1 = <&spi0_sleep>;
pinctrl-names = "default", "sleep";
cs-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
};
&pwm0 {
status = "okay";
pinctrl-0 = <&pwm0_default>;
pinctrl-1 = <&pwm0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi3 {
status = "okay";
compatible = "nordic,nrf-spim";
pinctrl-0 = <&spi3_default>;
pinctrl-1 = <&spi3_sleep>;
pinctrl-names = "default", "sleep";
led_strip: ws2812@0 {
compatible = "worldsemi,ws2812-spi";
/* SPI */
reg = <0>; /* ignored, but necessary for SPI bindings */
spi-max-frequency = <4000000>;
/* WS2812 */
chain-length = <21>;
spi-one-frame = <0x70>;
spi-zero-frame = <0x40>;
color-mapping = <LED_COLOR_ID_GREEN LED_COLOR_ID_RED LED_COLOR_ID_BLUE>;
};
};
boards/arm/eyelash_corne/eyelash_corne.yaml
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identifier: eyelash_corne
name: Eyelash Corne
url: https://github.com/a741725193/zmk-new_corne
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- adc
- usb_device
- ble
- ieee802154
- pwm
- watchdog
- gpio
- spi
boards/arm/eyelash_corne/eyelash_corne.zmk.yml
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file_format: "1"
id: eyelash_corne
name: Eyelash Corne
url: https://github.com/a741725193/zmk-new_corne
type: board
arch: arm
features:
- keys
- display
- underglow
- encoder
outputs:
- usb
- ble
siblings:
- eyelash_corne_left
- eyelash_corne_right
boards/arm/eyelash_corne/eyelash_corne_left.dts
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/*
*
* Copyright (c) 2024 The ZMK Contributors
* SPDX-License-Identifier: MIT
*
*/
#include "eyelash_corne.dtsi"
&left_encoder {
status = "okay";
};
boards/arm/eyelash_corne/eyelash_corne_left_defconfig
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#
# Copyright (c) 2024 The ZMK Contributors
# SPDX-License-Identifier: MIT
#
CONFIG_SOC_SERIES_NRF52X=y
CONFIG_SOC_NRF52840_QIAA=y
CONFIG_BOARD_EYELASH_CORNE_LEFT=y
# Enable 32kHz crystal
CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=y
CONFIG_CLOCK_CONTROL_NRF_K32SRC_30PPM=y
# Enable MPU
CONFIG_ARM_MPU=y
# enable pinctrl
CONFIG_PINCTRL=y
# enable GPIO
CONFIG_GPIO=y
# Enable SPI
CONFIG_SPI=y
# Enable writing to flash
CONFIG_USE_DT_CODE_PARTITION=y
CONFIG_BUILD_OUTPUT_UF2=y
CONFIG_MPU_ALLOW_FLASH_WRITE=y
CONFIG_NVS=y
CONFIG_SETTINGS_NVS=y
CONFIG_FLASH=y
CONFIG_FLASH_PAGE_LAYOUT=y
CONFIG_FLASH_MAP=y
CONFIG_ZMK_USB=y
CONFIG_ZMK_BLE=y
#EXT POWER
CONFIG_ZMK_EXT_POWER=y
#EC11 enable
CONFIG_EC11=y
CONFIG_EC11_TRIGGER_GLOBAL_THREAD=y
boards/arm/eyelash_corne/eyelash_corne_right.dts
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/*
*
* Copyright (c) 2024 The ZMK Contributors
* SPDX-License-Identifier: MIT
*
*/
#include "eyelash_corne.dtsi"
&default_transform {
col-offset = <7>;
};
boards/arm/eyelash_corne/eyelash_corne_right_defconfig
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#
# Copyright (c) 2024 The ZMK Contributors
# SPDX-License-Identifier: MIT
#
CONFIG_SOC_SERIES_NRF52X=y
CONFIG_SOC_NRF52840_QIAA=y
CONFIG_BOARD_EYELASH_CORNE_RIGHT=y
# Enable 32kHz crystal
CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=y
CONFIG_CLOCK_CONTROL_NRF_K32SRC_30PPM=y
# Enable MPU
CONFIG_ARM_MPU=y
# enable pinctrl
CONFIG_PINCTRL=y
# enable GPIO
CONFIG_GPIO=y
# Enable SPI
CONFIG_SPI=y
# Enable writing to flash
CONFIG_USE_DT_CODE_PARTITION=y
CONFIG_BUILD_OUTPUT_UF2=y
CONFIG_MPU_ALLOW_FLASH_WRITE=y
CONFIG_NVS=y
CONFIG_SETTINGS_NVS=y
CONFIG_FLASH=y
CONFIG_FLASH_PAGE_LAYOUT=y
CONFIG_FLASH_MAP=y
CONFIG_ZMK_USB=n
CONFIG_ZMK_BLE=y
#EXT POWER
CONFIG_ZMK_EXT_POWER=y